Registers For Dsp Module Idle Control - Texas Instruments OMAP5910 Reference Manual

Table 105. Registers for DSP Module Idle Control
BOOT_MODE[3:0]
0000
0001
0010
0011
0100
0101
Other
12.4.3.1 Direct Boot Mode
SPRU890A
Note:
The DSP MMU will determine the actual physical location of the PDROM
memory space when the on-chip PDROM is disabled.
Table 105 lists the supported boot modes.
Boot Process
Direct boot
External memory boot
DSP idle boot
Reserved
Reserved
Internal memory boot
Internal memory boot
The following sections describe each boot mode in detail.
When BOOT_MODE[3:0] = 0000b, the direct boot mode option is selected. In
this mode, the bootloader program does not execute because the on-chip
PDROM is not mapped into the internal memory map. The PDROM memory
map addresses are treated as DSP external memory addresses, and thus are
handled by the DSP EMIF and DSP MMU. When this boot option is selected,
the DSP core branches to the interrupt vector table in DSP external memory
space. For more information on the OMAP memory map, see section 3.4.
DSP Subsystem Reset, Clocking, Idle Control, and Boot
Description
The on-chip PDROM is disabled and the PDROM
memory space is mapped to DSP external
memory. The DSP core fetches the interrupt
vector table from 0xFF FF00 (located in DSP
external memory).
The bootloader simply branches to byte address
0x08 0000 in DSP external memory. Note that the
MPU core may need to set up the DSP MMU such
that the DSP core executes from valid DSP
external memory.
The bootloader places the DSP into idle mode.
Do not use this option.
Do not use this option.
The bootloader branches to internal byte address
0x01 0000.
The bootloader branches to internal byte address
0x02 4000.
DSP Subsystem 231