Thread Enable Status Register (Tensr) - IBM A2 User Manual

The TEN is accessed by using two registers: TENS and TENC. When TENS is written, threads for which the
corresponding bit in TENS is 1 are enabled; threads for which the corresponding bit in TENS is 0 are unaf-
fected. When TENC is written, threads for which the corresponding bit in TENC is 1 are disabled; threads for
which the corresponding bit in TENC is 0 are unaffected. When either SPR is read, the current value of the
TEN is returned.
Register Short Name:
Decimal SPR Number:
Initial Value:
Slow SPR:
Guest Supervisor Mapping:
Bits Field Name
0:31 ///
32:59 ///
60:63 TEN
Register Short Name:
Decimal SPR Number:
Initial Value:
Slow SPR:
Guest Supervisor Mapping:
Bits Field Name
0:31 ///
32:59 ///
60:63 TEN

2.3.2.5 Thread Enable Status Register (TENSR)

The TENSR indicates which threads are quiesced.
Programming Note: The TENSR is only valid after a context synchronizing instruction or an event that pre-
cisely stops a thread, such as a write to TEN.
Programming Note: When thread T1 disables other threads, Tn, it sets the 10 bits corresponding to Tn to
zeros. To ensure that all operations being performed by threads Tn have been performed with respect to all
threads on the processor, thread T1 reads the TENSR until all the bits corresponding to the disabled threads,
Tn, are zeros.
Version 1.3
October 23, 2012
TENS
438
0x0000000000000001
N
Initial
Value
0x0 Reserved
0x0 Reserved
0b0001 Thread Enable Set
For t < 4, bit 63-t corresponds to thread t. When bit 63-t is set to 1, thread t is enabled, if it
is not already. When bit 63-t is set 0, thread t is unaffected.
When bit 63-t is read, the current value of the thread enable is returned.
TENC
439
0x0000000000000001
N
Initial
Value
0x0 Reserved
0x0 Reserved
0b0001 Thread Enable Clear
For t < 4, bit 63-t corresponds to thread t. When bit 63-t is set to 1, thread t is disabled, if it
is not already. When bit 63-t is set 0, thread t is unaffected.
When bit 63-t is read, the current value of the thread enable is returned.
Read Access:
Write Access:
Duplicated for Multithread:
Notes:
Scan Ring:
Description
Read Access:
Write Access:
Duplicated for Multithread:
Notes:
Scan Ring:
Description
User's Manual
A2 Processor
Hypv
Hypv
N
WS
bcfg
Hypv
Hypv
N
WC
bcfg
CPU Programming Model
Page 73 of 864