Table of Contents
Advertisement
User's Manual
A2 Processor
Bits
Field Name
34:35
DAC1ER
36:37
DAC2US
38:39
DAC2ER
40
///
41
DAC12M
42:43
///
44:45
DVC1M
46:47
DVC2M
48:55
DVC1BE
56:63
DVC2BE
Debug Facilities
Page 420 of 864
Initial
Value
0b00
Data Address Compare 1 Effective/Real Mode
00
Effective: DAC1 debug events are based on effective addresses.
01
Not implemented.
10
Effective DS0: DAC1 debug events are based on effective addresses and if
MSR[DS] = 0.
11
Effective DS1: DAC1 debug events are based on effective addresses and if
MSR[DS] = 1.
0b00
Data Address Compare 2 User/Supervisor Mode
00
Enabled: DAC2 debug events can occur.
01
Reserved.
10
Enabled PR0: DAC2 debug events can occur only if MSR[PR] = 0.
11
Enabled PR1: DAC2 debug events can occur only if MSR[PR] = 1.
0b00
Data Address Compare 2 Effective/Real Mode
00
Effective: DAC2 debug events are based on effective addresses.
01
Not Implemented.
10
Effective DS0: DAC2 debug events are based on effective addresses and if
MSR[DS] = 0.
11
Effective DS1: DAC2 debug events are based on effective addresses and if
MSR[DS] = 1.
0b0
Reserved
0b0
Data Address Compare 1/2 Mode
0
Exact: Exact address compare.
1
Bit Match: Address bit match.
0b00
Reserved
0b00
Data Value Compare 1 Mode
00
DVC Disabled: DAC1 debug events can occur.
01
DVC All: DAC1 debug events can occur only when all bytes specified by DVC1BE
in the data value of the data storage access match their corresponding bytes in
DVC1.
10
DVC Any: DAC1 debug events can occur only when at least one of the bytes
specified by DVC1BE in the data value of the data storage access matches its cor-
responding byte in DVC1.
11
DVC HW: DAC1 debug events can occur only when all bytes specified in DVC1BE
within at least one of the halfwords of the data value of the data storage access
match their corresponding bytes in DVC1.
0b00
Data Value Compare 2 Mode
00
DVC Disabled: DAC2 debug events can occur.
01
DVC All: DAC2 debug events can occur only when all bytes specified by DVC2BE
in the data value of the data storage access match their corresponding bytes in
DVC2.
10
DVC Any: DAC2 debug events can occur only when at least one of the bytes
specified by DVC2BE in the data value of the data storage access matches its cor-
responding byte in DVC2.
11
DVC HW: DAC2 debug events can occur only when all bytes specified in DVC2BE
within at least one of the halfwords of the data value of the data storage access
match their corresponding bytes in DVC2.
0x0
Data Value Compare 1 Byte Enables
Specifies which bytes in the aligned data value being read or written by the storage access
are compared to the corresponding bytes in DVC1.
0x0
Data Value Compare 2 Byte Enables
Specifies which bytes in the aligned data value being read or written by the storage access
are compared to the corresponding bytes in DVC2.
Description
Version 1.3
October 23, 2012
Advertisement
Table of Contents
