List Of Figures - IBM A2 User Manual

List of Figures

Figure 1-1. A2 Core Organization ............................................................................................................. 50
Figure 1-2. A2 Processor Block Diagram ................................................................................................. 56
Figure 2-1. A2 Core Instruction Unit ......................................................................................................... 79
Figure 2-2. Instruction Issue Timing Diagram 1 ........................................................................................ 80
Figure 2-3. Instruction Issue Timing Diagram 2 ........................................................................................ 81
Figure 2-4. Instruction Issue Timing Diagram 3 ........................................................................................ 81
Figure 2-5. User Programming Model Registers ...................................................................................... 83
Figure 3-1. Approximation to Real Numbers .......................................................................................... 135
Figure 3-2. Selection of z1 and z2 .......................................................................................................... 140
Figure 4-1. Software-Initiated Reset Request Overview ........................................................................ 163
Figure 6-1. Virtual Address to TLB Entry Match Process ....................................................................... 190
Figure 6-2. Effective-to-Real Address Translation Flow ......................................................................... 192
Figure 6-3. ERAT Entry Word Definitions ............................................................................................... 220
Figure 6-4. ERAT Entry Word Definitions for 32-Bit Mode ..................................................................... 227
Figure 6-5. Indirect Entry to Page Table Size Calculation ...................................................................... 238
Figure 6-6. Page Table Entry Format ..................................................................................................... 239
Figure 9-1. Relationship of Timer Facilities to the Time Base ................................................................ 387
Figure 9-2. Watchdog State Machine ..................................................................................................... 395
Figure 10-1. Pass-Through Trace and Trigger Bus Overview .................................................................. 446
Figure 10-2. Trace and Trigger Bus Unit Description ............................................................................... 447
Figure 11-1. Performance Event Selection Overview ............................................................................... 449
Figure 11-2. Core Event Multiplexer Description ...................................................................................... 451
Figure 11-3. A2 Common Unit Event Multiplexer Component .................................................................. 456
Figure 12-1. ICSWX (RS
Figure 12-2. Coprocessor Command Word (CCW) .................................................................................. 518
Figure 12-3. Generic Coprocessor-Request Block ................................................................................... 520
Figure 15-1. Chip Level Infrastructure Example to Access SCOM Registers in the A2 Core .................. 702
Figure 15-2. Principle Timing of Information Carried on CCH and DCH .................................................. 702
Figure C-1. Debug Multiplexer Component ............................................................................................. 761
Figure D-1. A2 Pipeline Structure ........................................................................................................... 833
Figure D-2. Instruction Cache ................................................................................................................. 836
Figure D-3. Branch Prediction ................................................................................................................. 839
Figure D-4. FU Dataflow ......................................................................................................................... 851
Version 1.3
October 23, 2012
) Coprocessor-Command Word ................................................................. 517
32:63
User's Manual
A2 Processor
List of Figures
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