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User's Manual
A2 Processor
12.2.2 TLB Write Entry (tlbwe)
Software must use the tlbwe instruction to write entries into either the TLB or LRAT. This instruction is super-
visor privileged.
Because this instruction relies on the MAS Registers, execution of this instruction in ERAT-only mode
(CCR2[NOTLB] = 1) results in an illegal instruction exception. The instruction format and details follow.
tlbwe
31
///
///
0
6
11
if MAS0
= 0b00 | MAS0
WQ
if MAS0
= 0 or MSR
ATSEL
if MAS0
= 0 then
HES
entry SelectTLB(MAS1
else
entry SelectTLB(MAS1
if (MAS0
= 0b00) | (MAS0
WQ
if (MSR
= 1) & (MAS1
GS
rpn translate_logical_to_real(MAS7
else
rpn MAS7
entry
V IPROT TID TS SIZE
entry
W I M G E
MAS3
entry
U0:U3
if MAS1
= 1 and TLB0CFG
IND
entry
SPSIZE0 SPSIZE1 SPSIZE2 SPSIZE3 SPSIZE4 RPN[52]
rpn
52
MAS1
entry
IND
else
entry
UX SX UW SW UR SR
0
entry
IND
if MSR
= 0 then
CM
entry
EPN[0:31]
entry
EPN[32:51]
else
MAS2
entry
EPN
entry
RPN[22:51]
entry
TGS VF TLPID
entry
X R C Class WLC ResvAttr ThdID
entry
ExtClass
or_reduce(MAS1
entry
TID_NZ
else
entry SelectLRAT(MAS0
Implementation Dependent Instructions
Page 484 of 864
///
978
/
16
21
31
= 0b01 | MAS0
= 0b11 then
WQ
WQ
= 1 then
GS
, MAS2
TID TSIZE
, MAS2
TID TSIZE
= 0b01 & TLB reservation) | (MAS0
WQ
= 1) then
V
|| MAS3
RPNU
RPNL
MAS1
V IPROT TID TS TSIZE
MAS2
W I M G E
U0:U3
= 1 then
IND
IND
MAS3
UX SX UW SW UR SR
0
MAS2
EPN[32:51]
EPN
rpn
22:51
MAS8
TGS VF TLPID
MMUCR3
MAS1
& MMUCR3
IPROT
ECL
)
TID
)
ESEL
MAS0
)
EPN,
ESEL
, hardware_replacement_algorithm)
EPN
|| MAS3
, MAS8
RPNU
RPNL
MAS3
SPSIZE0 SPSIZE1 SPSIZE2 SPSIZE3
X R C Class WLC ResvAttr ThdID
= 0b11) then
WQ
)
TLPID
|| 0 ||
October 23, 2012
Version 1.3
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