Special Purpose Registers General (Sprg0-Sprg8); Table 2-40. Sprg0 Register; Table 2-41. Sprg1 Register - IBM A2 User Manual

User's Manual
A2 Processor
2.11.1 Special Purpose Registers General (SPRG0–SPRG8)
SPRG0 through SPRG8 are provided for general purpose, system-dependent software use. One common
system usage of these registers is as temporary storage locations. For example, a routine might save the
contents of a GPR to an SPRG and later restore the GPR from it. This is faster than a save/restore to a
memory location. These registers are written using mtspr and read using mfspr.
SPRG0 through SPRG2 These 64-bit registers can be accessed only in supervisor mode. Access to these
SPRG3
SPRG4 through SPRG7 These 64-bit registers can be written only in supervisor mode. These registers can
SPRG8

Table 2-40. SPRG0 Register

Register Short Name:
Decimal SPR Number:
Initial Value:
Slow SPR:
Guest Supervisor Mapping:
Bits Field Name
0:63 SPRG0

Table 2-41. SPRG1 Register

Register Short Name:
Decimal SPR Number:
Initial Value:
Slow SPR:
Guest Supervisor Mapping:
Bits Field Name
0:63 SPRG1
CPU Programming Model
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registers when in guest state is mapped to GSPRG0 through GSPRG2.
These 64-bit registers can be written only in supervisor mode. These registers can
be read in supervisor and user modes. Access to these registers when in guest
state is mapped to GSPRG3.
be read in supervisor and user modes.
These 64-bit registers can be accessed only in supervisor mode.
SPRG0
272
0x0000000000000000
N
GSPRG0
Initial
Value
0x0 Software Special Purpose Register 0
An SPR for software use that has no defined functionality.
SPRG1
273
0x0000000000000000
N
GSPRG1
Initial
Value
0x0 Software Special Purpose Register 1
An SPR for software use that has no defined functionality.
Read Access:
Write Access:
Duplicated for Multithread:
Notes:
Scan Ring:
Description
Read Access:
Write Access:
Duplicated for Multithread:
Notes:
Scan Ring:
Description
Priv
Priv
Y
array
Priv
Priv
Y
array
Version 1.3
October 23, 2012