Xesr4 - Xu Event Select Register 4 - IBM A2 User Manual

14.5.129 XESR4 - XU Event Select Register 4

Register Short Name:
Decimal SPR Number:
Initial Value:
Slow SPR:
Guest Supervisor Mapping:
Bits Field Name
32 INPSELEB4
33:37 MUXSELEB4
38 INPSELEB5
39:43 MUXSELEB5
44 INPSELEB6
45:49 MUXSELEB6
50 INPSELEB7
51:55 MUXSELEB7
56:63 ///
Version 1.3
October 23, 2012
XESR4
921
0x0000000000000000
Y
Initial
Value
0b0 Multiplexer Event_Bits[4] Input Select
For event multiplexer, bit 4, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T2_Events[0:31]
1 T3_Events[0:31]
0x0 Multiplexer Event_Bits[4] 2:1 Multiplexer Select
Determines which 2:1 multiplexer is gated for driving event multiplexer bit 4
(lsu_pc_event_bits[4]).
Decoded values select multiplexer 0 ('00000') through multiplexer 31 ('11111').
0b0 Multiplexer Event_Bits[5] Input Select
For event multiplexer, bit 5, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T2_Events[0:31]
1 T3_Events[0:31]
0x0 Multiplexer Event_Bits[5] 2:1 Multiplexer Select
Determines which 2:1 multiplexer is gated for driving event multiplexer bit 5
(lsu_pc_event_bits[5]).
Decoded values select multiplexer 0 ('00000') through multiplexer 31 ('11111').
0b0 Multiplexer Event_Bits[6] Input Select
For event multiplexer, bit 6, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T2_Events[0:31]
1 T3_Events[0:31]
0x0 Multiplexer Event_Bits[6] 2:1 Multiplexer Select
Determines which 2:1 multiplexer is gated for driving event multiplexer bit 6
(lsu_pc_event_bits[6]).
Decoded values select multiplexer 0 ('00000') through multiplexer 31 ('11111').
0b0 Multiplexer Event_Bits[7] Input Select
For event multiplexer, bit 7, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T2_Events[0:31]
1 T3_Events[0:31]
0x0 Multiplexer Event_Bits[7] 2:1 Multiplexer Select
Determines which 2:1 multiplexer is gated for driving event multiplexer bit 7
(lsu_pc_event_bits[7]).
Decoded values select multiplexer 0 ('00000') through multiplexer 31 ('11111').
0x0 Reserved
Read Access:
Write Access:
Duplicated for Multithread:
Notes:
Scan Ring:
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