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User's Manual
A2 Processor
14.5.116 TENS - Thread Enable Set Register
Register Short Name:
Decimal SPR Number:
Initial Value:
Slow SPR:
Guest Supervisor Mapping:
Bits
Field Name
0:31
///
32:59
///
60:63
TEN
Alphabetical Register Listing
Page 676 of 897
TENS
438
0x0000000000000001
N
Initial
Value
0x0
Reserved
0x0
Reserved
0b0001 Thread Enable Set
For t < 4, bit 63-t corresponds to thread t. When bit 63-t is set to 1, thread t is enabled, if it
is not already. When bit 63-t is set 0, thread t is unaffected.
When bit 63-t is read, the current value of the thread enable is returned.
Read Access:
Write Access:
Duplicated for Multithread:
Notes:
Scan Ring:
Description
Hypv
Hypv
N
WS
bcfg
Version 1.3
October 23, 2012
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