IBM A2 User Manual page 487

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MAS1
IPROT TID TS TSIZE
 entry
MAS1
IND
IND
 entry
MAS2
EPN W I M G E
if entry
= 1
IND
MAS3
SPSIZE0 SPSIZE1 SPSIZE2 SPSIZE3 SPSIZE4 UND
 entry
MAS3
RPNL[52]
else
MAS3
UX SX UW SW UR SR
 0
MAS3
RPNL[52]
 rpn
MAS3
RPNL[32:51]
 entry
MAS3
U0:U3
U0:U3
 rpn
MAS7
RPNU
0:31
 entry
MAS8
TGS VF TLPID
MMUCR3
X R C ECL TID_NZ Class WLC ResvAttr ThdID
if Rc = 1 then
 1
CR
CR0(2)
else
0
MAS0
ATSEL
 0
MAS0
ESEL
 TLB0CFG
MAS0
HES
HES
 0b01
MAS0
WQ
 0
MAS1
V IPROT
 MAS6
MAS1
TID TS
SPID SAS
 MAS4
MAS1
TSIZE
TSIZED
 MAS4
MAS1
IND
INDD
 MAS4
MAS2
W I M G E
 unchanged
MAS2
EPN
 0
MAS3
RPNL
MAS3
U0:U3 UX SX UW SW UR SR
 0
MAS7
RPNU
if Rc = 1 then
 0
CR
CR0(2)
An effective address (EA) is formed by adding an index to a base address. The index is the contents of
register RB. The base address is 0 if the RA field is 0 and is the contents of register RA
An effective page number (EPN) is determined from EA bits 0 to 51. The effective page number bits used for
page matching for a given TLB entry is EPN[0:63-p], where p = log
contains an entry corresponding to the virtual page number formed by MAS5
MAS6
, and EPN[0:63-p], and the entry's indirect bit (IND) matches that value in MAS6
SPID
contents and the index (the matching TLB way in this case) are read into the MAS and MMUCR3 registers. If
no valid matching translation exists, MAS1
itate a TLB replacement (MMUCR3 is unchanged). See Section 6.17.28 MAS Register Update Summary on
page 275 for a description of default values loaded into the MAS registers for this instruction. If more than one
entry matches the search parameters, a machine check exception is generated.
The record bit (Rc) specifies whether the results of the search will affect CR[CR0] as shown above, such that
CR[CR0]
can be tested if there is a possibility that the search might fail.
2
Version 1.3
October 23, 2012
 entry
IPROT TID TS SIZE
EPN W I M G E
RPN[52]
 entry
UX SX UW SW UR SR
32:51
TGS VF TLPID
entry
WD ID MD GD ED
 0
is set to 0 and the MAS registers are loaded with defaults to facil-
V
 entry
SPSIZE0 SPSIZE1 SPSIZE2 SPSIZE3
X R C ExtClass TID_NZ Class WLC ResvAttr ThdID
(entry page size in bytes). If the TLB array
2
SGS
Implementation Dependent Instructions
User's Manual
A2 Processor
|| 0 0
otherwise.
0:63
, MAS5
, MAS6
SLPID
SAS ,
, that entry's
SIND
Page 487 of 864

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