Mesr1 - Mmu Event Select Register 1 - IBM A2 User Manual

14.5.86 MESR1 - MMU Event Select Register 1

Register Short Name:
Decimal SPR Number:
Initial Value:
Slow SPR:
Guest Supervisor Mapping:
Bits Field Name
32 INPSELEB0
33:36 MUXSELEB0
37 INPSELEB1
38:41 MUXSELEB1
42 INPSELEB2
43:46 MUXSELEB2
47 INPSELEB3
48:51 MUXSELEB3
52:63 ///
Version 1.3
October 23, 2012
MESR1
916
0x0000000000000000
Y
Initial
Value
0b0 Multiplexer Event_Bits[0] Input Select
For event multiplexer, bit 0, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T0_Events[0:15].
1 T1_Events[0:15].
0b0000 Multiplexer Event_Bits[0] 2:1 Multiplexer Select
Determines which 2:1 multiplexer is gated for driving event multiplexer bit 0
(mm_pc_event_bits[0]].
Decoded values select multiplexer 0 ('0000') through multiplexer 15 '1111').
0b0 Multiplexer Event_Bits[1] Input Select
For event multiplexer, bit 1, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T0_Events[0:15].
1 T1_Events[0:15].
0b0000 Multiplexer Event_Bits[1] 2:1 Multiplexer Select
Determines which 2:1 multiplexer is gated for driving event multiplexer bit 1
(mm_pc_event_bits[1]].
Decoded values select multiplexer 0 ('0000') through multiplexer 15 '1111').
0b0 Multiplexer Event_Bits[2] Input Select
For event multiplexer, bit 2, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T0_Events[0:15].
1 T1_Events[0:15].
0b0000 Multiplexer Event_Bits[2] 2:1 Multiplexer Select
Determines which 2:1 multiplexer is gated for driving event multiplexer bit 2
(mm_pc_event_bits[2]].
Decoded values select multiplexer 0 ('0000') through multiplexer 15 ('1111').
0b0 Multiplexer Event_Bits[3] Input Select
For event multiplexer, bit 3, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T0_Events[0:15].
1 T1_Events[0:15].
0b0000 Multiplexer Event_Bits[3] 2:1 Multiplexer Select
Determines which 2:1 multiplexer is gated for driving event multiplexer bit 3
(mm_pc_event_bits[3]).
Decoded values select multiplexer 0 ('0000') through multiplexer 15 ('1111').
0x0 Reserved
Read Access:
Write Access:
Duplicated for Multithread:
Notes:
Scan Ring:
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