Unit Event Select Registers; Fu Event Select Register (Aesr) - IBM A2 User Manual

User's Manual
A2 Processor
Table 11-7. MMU Performance Events Table
(Use MESR1 and MESR2 for corresponding multiplexer selects)
Note: See the unit performance events table column descriptions in Section 11.3.3 on page 457.
Event Name
(Tag: B/C/E/S/V)
tlbivax_local_source_total(E) tlbivax invalidations sourced total (sourced tlbivax on this core
tlbivax_snoop_total (E)
tlb_flush_req_total (B)

11.5 Unit Event Select Registers

11.5.1 FU Event Select Register (AESR)

Register Short Name:
Decimal SPR Number:
Initial Value:
Slow SPR:
Guest Supervisor Mapping:
Bits Field Name
32 INPSELEB0
33:35 MUXSELEB0
36 INPSELEB1
37:39 MUXSELEB1
40 INPSELEB2
Performance Events and Event Selection
Page 466 of 864
(Sheet 2 of 2)
Description
total).
tlbivax snoops total (total tlbivax snoops received from bus,
local bit = don't care).
TLB flush requests total (TLB requested flushes due to TLB
busy or instruction hazards).
AESR
913
0x0000000000000000
Y
Initial
Value
0b0 Multiplexer Event_Bits[0] Input Select
For event multiplexer, bit 0, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T0_Events[0:7]
1 T1_Events[0:7]
0b000 Multiplexer Event_Bits[0] 2:1 Multiplexer Select
Determines which 2:1 multiplexer is gated for driving bit 0 of the event multiplexer
(fu_pc_event_bits[0]).
Decoded values select multiplexer 0 ('000') through multiplexer 7 ('111').
0b0 Multiplexer Event_Bits[1] Input Select
For event multiplexer, bit 1, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T0_Events[0:7]
1 T1_Events[0:7]
0b000 Multiplexer Event_Bits[1] 2:1 Multiplexer Select
Determines which 2:1 multiplexer is gated for driving bit 1 of the event multiplexer
(fu_pc_event_bits[1]).
Decoded values select multiplexer 0 ('000') through multiplexer 7 ('111').
0b0 Multiplexer Event_Bits[2] Input Select
For event multiplexer, bit 2, determines which group of performance event inputs are
selected to drive the bank of 2:1 multiplexers.
0 T0_Events[0:7]
1 T1_Events[0:7]
Core
Event?
Read Access:
Write Access:
Duplicated for Multithread:
Notes:
Scan Ring:
Description
Per Input_Sel Mux_Sel
Options Decode
(Tx_Events) (Mux 0:15)
Yes 3 13
Yes 3 14
Yes 3 15
Priv
Priv
N
func
Version 1.3
October 23, 2012