Csrr0 - Critical Save/Restore Register 0 - IBM A2 User Manual

User's Manual
A2 Processor

14.5.9 CSRR0 - Critical Save/Restore Register 0

Register Short Name:
Decimal SPR Number:
Initial Value:
Slow SPR:
Guest Supervisor Mapping:
Bits Field Name
0:61 SRR0
62:63 ///
Alphabetical Register Listing
Page 550 of 897
CSRR0
58
0x0000000000000000
N
Initial
Value
0x0 Critical Save/Restore Register 0
This register is used to save the machine state on critical interrupts and to restore
machine state when an rfci is executed. When a critical interrupt is taken, the CSRR0 is set
to the current or next instruction address. When rfci is executed, instruction execution con-
tinues at the address in CSRR0. In general, CSRR0 contains the address of the instruction
that caused the critical interrupt,or the address of the instruction to return to after a critical
interrupt is serviced.
0b00 Reserved
Read Access:
Write Access:
Duplicated for Multithread:
Notes:
Scan Ring:
Description
Hypv
Hypv
Y
AM
func
the
Version 1.3
October 23, 2012