Tensr - Thread Enable Status Register - IBM A2 User Manual

14.5.117 TENSR - Thread Enable Status Register

Register Short Name:
Decimal SPR Number:
Initial Value:
Slow SPR:
Guest Supervisor Mapping:
Bits Field Name
0:31 ///
32:59 ///
60:63 TENSR
Version 1.3
October 23, 2012
TENSR
437
0x0000000000000000
N
Initial
Value
0x0 Reserved
0x0 Reserved
0b0000 Thread Enable Status Register
Bit 63-t of the TENSR corresponds to thread t.
Read Access:
Write Access:
Duplicated for Multithread:
Notes:
Scan Ring:
Description
User's Manual
A2 Processor
Hypv
None
N
func
Alphabetical Register Listing
Page 677 of 897