Interrupt Definitions; Table 7-3. Interrupt And Exception Types - IBM A2 User Manual

Bits Field Name
59 TLBMH
60 IEPE
61 DEPE
62 TLBPE
63 ///

7.6 Interrupt Definitions

Table 7-3 provides a summary of each interrupt type in the order corresponding to their associated offset.
The table also summarizes the various exception types that can cause that interrupt type; the classification of
the interrupt; which ESR bits can be set, if any; and which mask bits can mask the interrupt type, if any.
Detailed descriptions of each of the interrupt types follow the table.

Table 7-3. Interrupt and Exception Types

Offset Interrupt Type
0x020 Critical Input
0x000 Machine Check
Version 1.3
October 23, 2012
Initial
Value
0b0 TLB Multi-Hit Error
1 Indicates a multiple entry hit error detected for a TLB compare.
0b0 I-ERAT Parity Error
1 Indicates a parity error detected for an I-ERAT eratre, eratsx, or compare.
0b0 D-ERAT Parity Error
1 Indicates a parity error detected for a D-ERAT eratre, eratsx, or compare.
0b0 TLB Parity Error
1 Indicates a parity error detected for a TLB tlbre, tlbsx, or reload.
0b0 Reserved
(Sheet 1 of 4)
Exception Type
Critical Input
Machine Check - All Sources
Description
ESR (GESR)
(See Note 4)
x x
User's Manual
A2 Processor
CE|GS 1
ME|GS 2
CPU Interrupts and Exceptions
Page 323 of 864