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User's Manual
A2 Processor
12.2.3 TLB Search Indexed (tlbsx[.])
Software must use the tlbsx[.] instruction to search entries in the TLB (searching the LRAT is not supported
in this implementation). This instruction is embedded hypervisor privileged. Execution of this instruction in
guest state (GS = 1) results in an embedded hypervisor privilege exception.
Because this instruction relies on the MAS Registers, execution of this instruction in ERAT-only mode
(CCR2[NOTLB] = 1) results in an illegal instruction exception. The instruction format and details follow.
tlbsx
RA,RB
tlbsx.
RA,RB
31
///
RA
0
6
11
if RA = 0 then b 0 else b (RA)
EA b + (RB)
EPN EA(0:51)
pid MAS6
SPID
as MAS6
SAS
gs MAS5
SGS
lpid MAS5
SLPID
vpn gs || lpid || as || pid || EPN
thread_num number of executing thread (0 to 3)
if Rc = 1 then
0
CR
CR0(0)
0
CR
CR0(1)
0
CR
CR0(3)
Valid_matching_entry_exists 0
for each TLB entry
m ¬((1 << (2 X (entry
n 64-log
(page size in bytes)
2
if ((EA
& m) = (entry
0:51
(entry
= MAS5
TLPID
(entry
= MAS6
TID
(entry
= 0 | EPN
X
then
Valid_matching_entry_exists 1
exit for loop
if Valid_matching_entry_exists = 1 then
entry matching entry found
index index of TLB entry found (TLB way)
rpn entry
RPN
0
MAS0
ATSEL
index
MAS0
ESEL
TLB0CFG
MAS0
HES
HES
0b01
MAS0
WQ
1
MAS1
V
Implementation Dependent Instructions
Page 486 of 864
RB
914
Rc
16
21
31
- 1))) - 1)
SIZE
& m)) &
EPN
| entry
= 0) & (entry
SLPID
TLPID
| entry
= 0) & (entry
SPID
TID
> entry
n:51
EPN[n:51]
Rc = 0
Rc = 1
= MAS5
TGS
= MAS6
) & (entry
TS
SAS
) & (entry
(thread_num) = 1)
THDID
) &
SGS
= MAS1
) &
IND
IND
October 23, 2012
Version 1.3
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