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parity positions) is sent directly to storage location
80 (positions 0-35) and no parity is generated.
Fold Operation: FLT op reg position 0 specifies the
fold operation. This operation is necessary to com-
pletely log or scan-out a 32-bit register as discussed
in Parity Bit Propagation. The fold operation sends
bits 28-31 of the specified register into SDR (24-27)
via the scan bus. This operation occurs on FLT op
reg codes 31, 35, 36, and 37.
Logout Operation: Initiated by the logout pushbutton
or a system error check. Either condition turns on
the log trigger (KT151) and the log trigger indicator
located on the system control panel. The logout
operation uses all three CPU control modes: se-
quence counter, main store, and ROS. The ROS
mode portion of a logout operation is performed by
the ROS scan-out kernel. Up to 42 storage locations
may be used for the storing of machine status. See
Figure 12.
Figure 18 shows the initial logout sequence under
sequence counter control mode and main store (MS)
mode before logout is completed under ROS mode.
Log Trigger
The log trigger is set on
if
the log-request trigger
(KT101-5F) is on and an error condition occurs.
It
may also be set on by depressing the logout PB on
the system control panel. Either of the two preced-
ing conditions initiates a logout which is indicated
by the log trigger indicator on the 'system control
panel. The log trigger is checked in one of the ROS
maintenance routines (scan-out kernel) where its
status determines the path to be followed in ROS.
Supervisory Stat
When on, the supervisory stat (SS) puts the number of
microinstructions (ROS words) to be executed under
control of the sequence counter. The SS also inhibits
storage access unless the supervisory enable storage
stat (SESS)
is
on. The SS is set to the value of
SDR(6) by the microorder E -
SCANCTL combined
with EMIT 1000 (QY110-C5), When the sequence
counter reaches seven, the SS is reset off (KH321-6J).
Progressive Scan Stat
The progressive scan stat (PSS) is set on by bit 14
of the diagnose instruction, via SDR(5), or by bit 5
of a linkage control word (LCW). The PSS is also
set on by depressing the start PB when the FLT
mode switch is on the force pass position. The PSS
is checked in various ROS kernels where its status
32
(3/71}
Model SO FEMM
determines the path to be followed within ROS. Test-
ing the PSS resets
it
off unless an inhibit storage
condition (SS on and SESS off) exists. When the PSS
is tested and found to be on, it usually initiates the
fetching of a new LCW from main storage. The PSS
is off when reset, normally off for FLT execution,
and always off during an error logout.
Supervisory Enable Stori;ige Stat
The supervisory enable storage stat (SESS) allows
access to main storage even though the supervisory
stat (SS) is on. This is accomplished by decondition-
ing the inhibit stori;ige line activated by the super-
visory stat (KH331-2E). The SESS is set to the value
of SDR(4) by the microorder E -
SCANCTL com-
bined with EMIT 1000 (QY110-C5). The SESS is
reset off when the sequence counter equals seven and
the supervisory stat is on (KH321-6J).
Binary Trigger
The binary trigger is used when running FLT's. In
main store mode, FLT op reg instructions are used
to reset off (op codes 07 or 08), or step (op code OF), or
test (op code OE) this trigger. In ROS mode, the
microorder E -
SCANCTL (combined with the emit
field bits) is used to test and/or set or reset the
binary trigger in the FLT compare and branch ker-
nel (QY510).
Scan Test Counter
The scan test counter controls the number of times
(16) each individual test is executed during the FLT
zero and one-cycle tests. The microorder, STC
=
0,
branches on and increments the counter (QY510-G5)
on each pass through the FLT compare and branch
kernel. The cowtter equals one when in the reset
position.
Pass/Fail Triggers
The pass and fail triggers are used in the FLT com-
pare and branch kernel in ROS (QY510). They are
set, according to the status of the binary trigger,
by the microorder E ._ SCANCTL in combination
with EMIT 0001. That is,
if
the binary trigger is on,
the fail trigger is set;
if
the binary trigger is off,
the pass trigger is set. They are both uncondition-
ally reset off by the same microorder (E - SCA NC TL)
in combination with EMIT 0101. The pass trigger is
tested, and branched on, by the microorder SCPS.
The fail trigger is tested, and branched on, by the
microorder SCFS.
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