Table 3-1. Boot Configuration For Silicon Version A.0 - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide
PC[7:4]
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
0xC
0xD
0xE
0xF
PC[7:4]
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
0xC
0xD
0xE
0xF

Table 3-1. Boot Configuration for Silicon Version A.0

DEVICE TYPE
NOR Flash or SRAM
NOR Flash or SRAM
NOR Flash or SRAM
NOR Flash or SRAM
NAND Flash (Small Block) 8-bit
NAND Flash (Small Block)
NAND Flash (Small Block)
NAND Flash (Small Block)
NOR Flash or SRAM
NOR Flash or SRAM
RESERVED
RESERVED
NAND Flash (Small Block)
NAND Flash (Small Block)
RESERVED
RESERVED
Table 3-2. Boot Configuration for Silicon Version A.1
DEVICE TYPE
NOR Flash or SRAM
NOR Flash or SRAM
NOR Flash or SRAM
NOR Flash or SRAM
NAND Flash (Small Block)
NAND Flash (Small Block)
NAND Flash (Large Block)
NAND Flash (Small Block)
NOR Flash or SRAM
NOR Flash or SRAM
RESERVED
RESERVED
NAND Flash (Small Block)
NAND Flash (Large Block)
2
I C
UART
Version 1.0
DATA BUS WIDTH
16-bit
16-bit
8-bit
8-bit
8-bit
8-bit
16-bit
32-bit
32-bit
RESERVED
RESERVED
16-bit
16-bit
RESERVED
RESERVED
DATA BUS WIDTH
16-bit
16-bit
8-bit
8-bit
8-bit
8-bit
8-bit
16-bit
32-bit
32-bit
RESERVED
RESERVED
16-bit
16-bit
—
—
Boot Controller
CONTROL
nBLEx LOW for Reads
nBLEx HIGH for Reads
nBLEx LOW for Reads
nBLEx HIGH for Reads
3-byte Address
4-byte Address
5-byte Address
3-byte Address
nBLEx LOW for Reads
nBLEx HIGH for Reads
RESERVED
RESERVED
4-byte Address
5-byte Address
RESERVED
RESERVED
CONTROL
nBLEx LOW for Reads
nBLEx HIGH for Reads
nBLEx LOW for Reads
nBLEx HIGH for Reads
3-byte Address
4-byte Address
4/5-byte Address
3-byte Address
nBLEx LOW for Reads
nBLEx HIGH for Reads
RESERVED
RESERVED
4-byte Address
4/5-byte Address
—
—
3-3