Table 8-5. P1Drx Register; Table 8-6. P1Drx Fields; Register Descriptions - Sharp LH79524 User Manual

General Purpose Input/Output

8.2.2 Register Descriptions

8.2.2.1 Port A/C/E/G/I/K/M Data Registers (P1DRx)
Values written to P1DRx are output on the PA/PC/PE/PG/PI/PK/PM pins if the correspond-
ing P1DDRx Data Direction bits are set for output. When the corresponding Data Direction
Register bit for a pin is set for input, the value read is the state of the GPIO pin. Reading
this register returns either:
• The last bit value written if the bit is configured as an output.
• The current value on the corresponding port pin if configured as an input.
Port K is only available on the LH79524. Port M is an output only port. This register will not
input values from the Port M pins.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:8
7:0
8-8
31 30 29 28 27
0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 0 0
RO RO RO RO RO
Port M: 0xFFFD9000 + 0x00 (Bits 7 and 6 LH79524 Only)
NAME
/// Reserved Reading this field returns 0. Write the reset value.
Port Input/Output Data Contains the bit-by-bit Port input or output
data, depending on how the corresponding bit in the P1DDRx Register is
PORT_DATA
programmed.
Note that bits 7 and 6 of Port M exist on LH79524 only.

Table 8-5. P1DRx Register

26 25 24 23
///
0 0 0 0 0
RO RO RO RO
10 9 8 7
0 0 0 0 0
RO RO RO RW
Port A: 0xFFFDF000 + 0x00
Port C: 0xFFFDE000 + 0x00
Port E: 0xFFFDD000 + 0x00
Port G: 0xFFFDC000 + 0x00
Port I: 0xFFFDB000 + 0x00
Port K: 0xFFFDA000 + 0x00 (LH79524 Only)

Table 8-6. P1DRx Fields

DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
PORT_DATA
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
RO RO
1 0
0 0
RW RW