LH79524/LH79525 User's Guide
1.4.1 Resetting the Test Access Port Controller
The on-chip Test Access Port (TAP) Controller has an independent reset pin, nTRST.
However, it must also be reset at power on, or any time the SoC is reset to ensure it exits
the power up sequence in Normal Mode.
To ensure this, an external AND gate is necessary to AND nTRST and nRESETIN.
Figure 1-4 illustrates the minimal circuit capable of guaranteeing the proper reset signals.
If the application will require a push button reset, the circuit in Figure 1-5 is recommended.
nTRST
nRESETIN
Figure 1-4. Reset Circuit for TAP Controller
Version 1.0
LH79524/LH79525
nTRST
nRESETIN
Overview
LH79525-116
1-9