Figure 1-6. Active Pullup Circuit; Active Pull Ups - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

1.4.2.3 Active Pull Ups

The boot mode — NOR Flash, NAND Flash, SRAM, I2C, or UART — is selected by
the value latched on the rising edge of the nRESETOUT signal from the state of Port C,
pins [7:4]. Pins PC[7:6] are used during NAND Flash booting as control signals, but PC[5:4]
have no other use following the end of reset. Therefore, those two GPIO pins can be used
during normal operation if an active pullup is used, gated by the nRESETOUT signal.
Figure 1-6 shows a schematic representation of one active pullup circuit. One circuit is
required for each PCx pin to be pulled high during reset. nRESETOUT is presented to the
Gate (pin 1) of the P-Channel FET. When active (LOW), nRESETOUT causes the transistor
to turn on, and pull the PCx input HIGH. When nRESETOUT transitions from LOW to HIGH
at the end of the reset period, the value on PC[7:4] is latched and the FET is turned off, thus
allowing those pins to be used for general purpose I/O or as address pins A[21:20]. As shown
in the figure, a common pull up resistor can be used for all of the FETs.
+3.3 V
120 Ω
BSS84
2 3
1
BSS84
2 3
1

Figure 1-6. Active Pullup Circuit

Version 1.0
LH79524/LH79525
PCx
nRESETOUT
PCy
Overview
LH79525-104
1-11