Table 11-64. Muxctl23 Register; Table 11-65. Muxctl23 Fields; Multiplexing Control 23 Register (Muxctl23) - Sharp LH79524 User Manual

I/O Configuration

11.2.2.32 Multiplexing Control 23 Register (MUXCTL23)

The MUXCTL23 Register allows software to configure a number of LH79524/LH79525 pins.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
11-48

Table 11-64. MUXCTL23 Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
PG1 PG0
0 0 0 0 0
RW RW RW RW RW

Table 11-65. MUXCTL23 Fields

BIT NAME
31:16 /// Reserved Reading returns 0. Write the reset value.
PG1/ETHERTXCLK Assignment
00 = PG1
15:14 PG1
01 = ETHERTXCLK
10 = Reserved
11 = Reserved
PG0/ETHERTXEN Assignment
00 = PG0
13:12 PG0
01 = ETHERTXEN
10 = Reserved
11 = Reserved
PH7/ETHERTX3 Assignment
00 = PH7
11:10 PH7
01 = ETHERTX3
10 = Reserved
11 = Reserved
PH6/ETHERTX2 Assignment
00 = PH6
9:8 PH6
01 = ETHERTX2
10 = Reserved
11 = Reserved
PH5/ETHERTX1 Assignment
00 = PH5
7:6 PH5
01 = ETHERTX1
10 = Reserved
11 = Reserved
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
PH7 PH6 PH5
0 0 0 0
RW RW RW RW
0xFFFE5000 + 0xB0
DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
PH4 PH3
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
RO RO
1 0
PH2
0 0
RW RW