Table 17-18. Uie Register; Table 17-19. Uie Fields; Interrupt Enable Register (Uie) - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

17.2.2.8 Interrupt Enable Register (UIE)

UIE provides interrupt enable bits for the interrupts in UIR. Following reset, only the USB
RESET and the RESUME interrupts are enabled.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:3
3
2
1
0
31 30 29 28
0 0 0 0
RO RO RO RO RO
15 14 13 12
0 0 0 0
RO RO RO RO RO
NAME
/// Reserved Reading returns 0. Write the reset value.
SOF Interrupt Enable
SOFINTEN
1 = Interrupt enabled
0 = Interrupt disabled
USB RESET Interrupt Enable
URINTEN
1 = Interrupt enabled
0 = Interrupt disabled
RESUME Interrupt Enable
RESINTEN
1 = Interrupt enabled
0 = Interrupt disabled
SUSPEND Interrupt Enable Software programs this bit to 1 to enable an
Interrupt when it receives SUSPEND signalling. This bit is set whenever
there is no activity for 3 ms on the bus. Thus, if the CPU does not stop the
clock after the first SUSPEND interrupt, it will continue to be interrupted ev-
SUSINTEN
ery 3 ms as long as there is no activity on the USB bus. Following reset, this
interrupt is disabled.
1 = Interrupt enabled
0 = Interrupt disabled

Table 17-18. UIE Register

27 26 25 24 23
///
0 0 0 0 0
RO RO RO RO
11 10 9 8 7
///
0 0 0 0 0
RO RO RO RO
0xFFFF5000 + 0x02C

Table 17-19. UIE Fields

FUNCTION
Version 1.0
Universal Serial Bus Device
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
0 0 0 0 1
RO RO RO RW RW
17 16
0 0
RO RO
1 0
1 0
RW RW
17-17