Real Time Clock
12.2.2.2 Match Register (MR)
MR is the Match Register. Program the value at which the RTC Interrupt will be generated
into this register. The difference between this value and the value in the Load Register is
the time in seconds, between count initiation and interrupt generation. The current setting
can be read.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:0
12.2.2.3 Load Register (LR)
LR is the Load Register. Program this register with the value from which to initiate the
count sequence. The count begins on the next rising edge of the 1 Hz clock. Note that
counting may not begin for up to one second.
Reading this register returns the last value written.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:0
12-4
31
30
29
28
27
0
0
0
0
0
RW
RW
RW
RW
RW
15
14
13
12
11
0
0
0
0
0
RW
RW
RW
RW
RW
NAME
RTCMR
RTC Match Register Contains the match value in hexadecimal.
31
30
29
28
27
0
0
0
0
0
RW
RW
RW
RW
RW
15
14
13
12
11
0
0
0
0
0
RW
RW
RW
RW
RW
NAME
RTCLR
RTC Load Register Hexadecimal start count value
Table 12-4. MR Register
26
25
24
23
RTCMR
0
0
0
0
RW
RW
RW
RW
10
9
8
7
RTCMR
0
0
0
0
RW
RW
RW
RW
0xFFFE0000 + 0x04
Table 12-5. MR Fields
DESCRIPTION
Table 12-6. LR Register
26
25
24
23
RTCLR
0
0
0
0
RW
RW
RW
RW
10
9
8
7
RTCLR
0
0
0
0
RW
RW
RW
RW
0xFFFE0000 + 0x08
Table 12-7. LR Fields
DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22
21
20
19
18
0
0
0
0
0
RW
RW
RW
RW
RW
6
5
4
3
2
0
0
0
0
0
RW
RW
RW
RW
RW
22
21
20
19
18
0
0
0
0
0
RW
RW
RW
RW
RW
6
5
4
3
2
0
0
0
0
0
RW
RW
RW
RW
RW
17
16
0
0
RW
RW
1
0
0
0
RW
RW
17
16
0
0
RW
RW
1
0
0
0
RW
RW