Table 19-1. Watchdog Timer Memory Map; Register Reference - Sharp LH79524 User Manual

Watchdog Timer

19.2 Register Reference

This section describes the location and programming of the WDT registers.
19.2.1 Memory Map
Register offsets in Table 19-1 are relative to the Timer base address
19-4

Table 19-1. Watchdog Timer Memory Map

ADDRESS
NAME
OFFSET
0x00 CTL
0x04 RST
0x08 STATUS
0x0C COUNT0
0x10 COUNT1
0x14 COUNT2
0x18 COUNT3
Version 1.0
LH79524/LH79525 User's Guide
DESCRIPTION
Watchdog Control Register
Watchdog Counter Reset
Watchdog Status Register
Current Count bits [7:0]
Current Count bits [15:8]
Current Count bits [23:16]
Current Count bits [31:24]
.
0xFFFC3000