Smc Register Definitions; Configuration Register For Memory Bank 0; Table 7-9. Bcr0 Register (16-Bit Mode); Table 7-10. Bcr0 Register (8-Bit Mode) - Sharp Blue Treak LH75400 User Manual

LH75400/01/10/11 (Preliminary) User's Guide

7.3.2 SMC Register Definitions

7.3.2.1 Configuration Register for Memory Bank 0

Register BCR0 has a reset value of either 0x1000FFEF (for 16-bit Mode) or 0x0000FBEF
(for 8-bit Mode).
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR

Table 7-9. BCR0 Register (16-bit Mode)

31 30 29 28 27
/// MW BM
0 0 0 1 0
R R RW RW RW
15 14 13 12 11
WST2
1 1 1 1 1
RW RW RW RW RW

Table 7-10. BCR0 Register (8-bit Mode)

31 30 29 28 27
/// MW BM
0 0 0 0 0
R R RW RW RW
15 14 13 12 11
WST2
1 1 1 1 1
RW RW RW RW RW
26 25 24 23 22
WP
0 0 0 0 0
RW RW RW R R
10 9 8 7 6
WST1
1 1 1 1 1
RW RW RW RW RW
0xFFFF1000 + 0x00
26 25 24 23 22
WP
0 0 0 0 0
RW RW RW R R
10 9 8 7 6
WST1
0 1 1 1 1
RW RW RW RW RW
0xFFFF1000 + 0x00
6/17/03
Static Memory Controller
21 20 19 18 17
///
0 0 0 0 0
R R R R R
5 4 3 2 1
/// IDCY
1 0 1 1 1
RW R RW RW RW
21 20 19 18 17
///
0 0 0 0 0
R R R R R
5 4 3 2 1
/// IDCY
1 0 1 1 1
RW R RW RW RW
16
0
R
0
1
RW
16
0
R
0
1
RW
7-13