Table 8-2. Lh79524 Gpio Multiplexing - Sharp LH79524 User Manual

General Purpose Input/Output
8.1.1.1 Multiplexing
All of the GPIO pins are multiplexed with one or more other functions. Selecting certain on-
chip peripherals removes the GPIO function from that pin. Configuration of these multi-
plexed pins is described in the I/O Configuration chapter.
Table 8-2 and Table 8-3 show the multiplexed functions of each GPIO pin. In the case of
Port J and Port M, the reset function is not GPIO, hence those functions are listed in the
'Multiplexed Function' column.
8-2

Table 8-2. LH79524 GPIO Multiplexing

CABGA
AT RESET
NO.
N1 PA0
M2 PA1
L3 PA2
M1 PA3
L2 PA4
L1 PA5
K3 PA6
K2 PA7
R2 PB0
R1 PB1
P2 PB2
N3 PB3
M4 PB4
P1 PB5
N2 PB6
M3 PB7
N7 PC0
R6 PC1
T5 PC2
P6 PC3
R5 PC4
T4 PC5
P5 PC6
R4 PC7
P15 PD0
P14 PD1
N13 PD2
T15 PD3
N12 PD4
T14 PD5
P12 PD6
T13 PD7
MULTIPLEXED FUNCTION(S)
INT2/UARTRX2/UARTIRRX2
INT3/UARTTX2/UARTIRTX2
CTCAP0A/CTCMP0A
CTCAP0B/CTCMP0B
CTCAP1A/CTCMP1A
CTCAP1B/CTCMP1B
CTCAP2A/CTCMP2A/SDA
CTCAP2B/CTCMP2B/SCL
nDACK/nUARTCTS0
DREQ/nUARTRTS0
SSPFRM/I2SWS
SSPCLK/I2SCLK
SSPRX/I2SRXD/UARTRX1/UARTIRRX1
SSPTX/I2STXD/UARTTX1/UARTIRTX1
INT0/UARTRX0/UARTIRRX0
INT1/UARTTX0/UARTIRTX0
A16
A17
A18
A19
A20
A21
A22/nFWE
A23/nFRE
D8
D9
D10
D11
D12
D13
D14
D15
Version 1.0
LH79524/LH79525 User's Guide