LH79524/LH79525 User's Guide
Table 7-5. 32-bit Wide Data Bus Address Mapping, SDRAM (RBC) (Cont'd)
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
NOTE: The EMC does a constant burst of 8 when configured to access 16 bit memory devices. Similarly it
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
External Address Pin, A[14:0]
AHB Address To Row Address
AHB Address To Column Address
32-BIT DEVICE 64M SDRAM (8M × 8, RBC)
11/BA1
11/BA1
32-BIT DEVICE 128M SDRAM (4M × 32, RBC)
11/BA1
11/BA1
32-BIT DEVICE 128M SDRAM (8M × 16, RBC)
11/BA1
11/BA1
32-BIT DEVICE 128M SDRAM (16M × 8, RBC)
13/BA1
13/BA1
32-BIT DEVICE 256M SDRAM 8M × 32, RBC)
11/BA1
11/BA1
32-BIT DEVICE 256M SDRAM 16M × 16, RBC)
11/BA1
11/BA1
32-BIT DEVICE 256M SDRAM 32M × 8, RBC)
13/BA1
13/BA1
32-BIT DEVICE 512M SDRAM 32M × 16, RBC)
13/BA1
13/BA1
32-BIT DEVICE 512M SDRAM 64M × 8, RBC)
13/BA1
13/BA1
does a burst of 4 when configured to access 32-bit memory devices.
Table 7-6. 32-bit Wide Data Bus Address Mapping, SDRAM (BRC)
32-BIT DEVICE 16M SDRAM (1M × 16, BRC)
21/BA1
21/BA1
32-BIT DEVICE 16M SDRAM (2M × 8, BRC)
14
13
12
11
10
12/BA0
—
24
23
12/BA0
—
—
AP
14
13
12
11
10
10/BA0
—
23
22
10/BA0
—
—
AP
14
13
12
11
10
12/BA0
—
24
23
12/BA0
—
—
AP
14
13
12
11
10
12/BA0
—
25
24
12/BA0
—
—
AP
14
13
12
11
10
10/BA0
24
23
22
10/BA0
—
—
AP
14
13
12
11
10
12/BA0
25
24
23
12/BA0
—
—
AP
14
13
12
11
10
12/BA0
26
25
24
12/BA0
—
—
AP
14
13
12
11
10
12/BA0
26
25
24
12/BA0
—
—
AP
14
13
12
11
10
14/BA0
27
26
25
14/BA0
—
12
AP
14
13
12
11
10
—
—
—
20
—
—
—
AP
14
13
12
11
10
—
22/BA0
—
—
21
—
22/BA0
—
—
AP
Version 1.0
External Memory Controller
9
8
7
6
5
4
22
21
20
19
18
17
16
—
10
9
8
7
6
9
8
7
6
5
4
21
20
19
18
17
16
15
—
—
9
8
7
6
9
8
7
6
5
4
22
21
20
19
18
17
16
—
10
9
8
7
6
9
8
7
6
5
4
23
22
21
20
19
18
17
11
10
9
8
7
6
9
8
7
6
5
4
21
20
19
18
17
16
15
—
—
9
8
7
6
9
8
7
6
5
4
22
21
20
19
18
17
16
—
10
9
8
7
6
9
8
7
6
5
4
23
22
21
20
19
18
17
11
10
9
8
7
6
9
8
7
6
5
4
23
22
21
20
19
18
17
11
10
9
8
7
6
9
8
7
6
5
4
24
23
22
21
20
19
18
11
10
9
8
7
6
9
8
7
6
5
4
19
18
17
16
15
14
13
—
—
9
8
7
6
9
8
7
6
5
4
20
19
18
17
16
15
14
—
10
9
8
7
6
3
2
1
0
15
14
13
5
4
3
2
3
2
1
0
14
13
12
5
4
3
2
3
2
1
0
15
14
13
5
4
3
2
3
2
1
0
16
15
14
5
4
3
2
3
2
1
0
14
13
12
5
4
3
2
3
2
1
0
15
14
13
5
4
3
2
3
2
1
0
16
15
14
5
4
3
2
3
2
1
0
16
15
14
5
4
3
2
3
2
1
0
17
16
15
5
4
3
2
3
2
1
0
12
11
10
5
4
3
2
3
2
1
0
13
12
11
5
4
3
2
7-23