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2
I
S Converter
SSPFSSOUT
(MASTER)
MASTER
CLOCK
ENABLE
SSPFSSIN
(SLAVE)
SSP/I
MODE
SSPRXD
SSP/I
MODE
10-2
STROBE
CONVERSION
SSP PULSE >
2
I
S LEVEL
SSPTXD
1
0
TXFIFO
UNDERUN
SSP
SUPPRESSION
2
I
S
LOGIC
2
S
WSDEL
SSP
2
I
S
2
S
MASTER/SLAVE
Figure 10-1. I
WS DELAY
0
WS INVERSION
1 CLOCK
1
DELAY
WSDEL
WSINV
1 CLOCK
MASTER
DELAY
CLOCK
ENABLE
FRAME
DELAY
MASTER/SLAVE
SLAVE
CLOCK
ENABLE
SLAVE CLOCK ENABLE
1
0
CLOCK
DELAY
STROBE CONVERSION
2
I
S LEVEL > SSP PULSE
1
MASTER
CLOCK
ENABLE
FRAME
M
DELAY
1 CLOCK
S
DELAY
SLAVE CLOCK
ENABLE
2
S Converter Block Diagram
Version 1.0
LH79524/LH79525 User's Guide
SSP SSPFSS_I2SWS_OUT
(MASTER)
0
2
I
S
1
2
SSP/I
S
MODE
SSP
SSPTX_I2STXD_OUT
M
2
I
S
S
2
SSP/I
S
MODE
SSP
SSPOE_n
SSP_I2S_OE_n
2
I
S
2
SSP/I
S
MODE
SSPFSS_I2SWS_IN
(SLAVE)
SLAVE CLOCK
ENABLE
SSPRX_I2SRXD_IN
SSPTX_I2STXD_OUT
LOOPBACK
LH79525-103
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