Table 11-26. Muxctl10 Register; Table 11-27. Muxctl10 Fields; Multiplexing Control 10 Register (Muxctl10) - Sharp LH79524 User Manual

I/O Configuration

11.2.2.13 Multiplexing Control 10 Register (MUXCTL10)

The MUXCTL10 Register allows software to configure a number of LH79524/LH79525
pins. Bits marked 'LH79524 Only' read as 0 with all writes 'reserved' on the LH79525.
BIT
FIELD
RESET
RW
BIT
FIELD
LH79525
RESET
LH79524
RESET
RW
ADDR
11-18

Table 11-26. MUXCTL10 Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
PN3 PN2
0 0 0 0 0
0 1 0 1 0
RW RW RW RW RW

Table 11-27. MUXCTL10 Fields

BIT NAME
31:16 /// Reserved Reading returns 0. Write the reset value.
PN3/D25 Assignment (LH79524 Only)
00 = PN3
PN3
15:14
01 = D25
10 = Reserved
11 = Reserved
PN2/D24 Assignment (LH79524 Only)
00 = PN2
PN2
13:12
01 = D24
10 = Reserved
11 = Reserved
PD7/D15 Assignment
00 = PD7
11:10 PD7
01 = D15
10 = Reserved
11 = Reserved
PK7/D23 Assignment (LH79524 Only)
00 = PK7
9:8 PK7
01 = D23
10 = Reserved
11 = Reserved
PD6/D14 Assignment
00 = PD6
7:6 PD6
01 = D14
10 = Reserved
11 = Reserved
Version 1.0
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
PD7 PK7 PD6
1 0 0 0
1 0 1 0
RW RW RW RW
0xFFFE5000 + 0x48
DESCRIPTION
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
PK6 PD5
1 0 0 0 1
1 0 1 0 1
RW RW RW RW RW
17 16
0 0
RO RO
1 0
PK5
0 0
0 1
RW RW