Table 15-14. T0Cmpn Registers; Table 15-15. T0Cmpn Register Definitions; Timer 0 Compare Registers (T0Cmpn) - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

15.2.2.6 Timer 0 Compare Registers (T0CMPn)

There are two T0CMPn Registers for Timer 0. They are designated:
• T0CMP0
• T0CMP1
Each register is a 16-bit, read/write register. Contents of these registers are compared
continuously with the counter CNT0. When both register and counter values match, the
timer responds as programmed in the CMP_CAP_CTRL register.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:16
15:0

Table 15-14. T0CMPn Registers

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
1 1 1 1 1
RW RW RW RW RW

Table 15-15. T0CMPn Register Definitions

NAME
Reserved Reading this field returns 0. Write the reset value.
///
TM0CMP Timer 0 Compare 16-bit compare register value.
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
TM0CMP
1 1 1 1
RW RW RW RW
CMP0: 0xFFFC4000 + 0x14
CMP1: 0xFFFC4000 + 0x18
DESCRIPTION
Version 1.0
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
1 1 1 1 1
RW RW RW RW RW
Timers
17 16
0 0
RO RO
1 0
1 1
RW RW
15-13