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Glossary
Back-Off Time
In Ethernet communications, this is a random period of time that a device attempting com-
munication waits following a collision before re-attempting communication.
Big-endian
The most significant part of the data is stored at the lowest storage address or transmitted
or received first. See Endianness.
Block
A Block is the on-chip circuitry to implement a peripheral, memory circuit, or processor.
Byte
An 8-bit data element. Bytes in this User's Guide are shown with the most significant bit
on the left (or top) and the least significant bit on the right (or bottom). Also see Half Word,
Nibble, and Word.
Byte Lane
A data path that is one byte wide.
Checksum
A checksum is generated by adding all data elements of a packet together, and throwing
away the carry. The same as done at the receiving end. If the checksums are different, a
transmission error occurred. Generally, the receiver asks the transmitter to resend the pre-
vious data packet.
Chip
A packaged integrated circuit device.
CLCDC
The on-chip Color Liquid Crystal Display Controller.
Core
See ARM720T Core.
CPSR
Current Program Status Register. In ARM architecture, it stores the condition code bits.
CSMA/CD
Carrier Sense Multiple Access/Collision Detection. This is a network access method in
which devices that are ready to transmit data first check the channel for a carrier. If no car-
rier is sensed, a device can transmit. If two devices do transmit at once, a collision occurs
and each computer backs off and waits a random amount of time before attempting to
retransmit. This is the access method used by Ethernet. See also MAC and Back Off Time.
DMA
Direct Memory Access. The LH79524/LH79525 includes an on-chip DMA Controller.
20-2
Version 1.0
LH79524/LH79525 User's Guide
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