Sharp LH79524 User Manual page 21

List of Tables
Table 2-26. ILWCTRL Fields.................................................................................... 2-24
Table 2-27. MIS Register ......................................................................................... 2-25
Table 2-28. MIS Fields ............................................................................................. 2-25
Table 2-29. IC Register ............................................................................................ 2-26
Table 2-30. IC Fields ................................................................................................ 2-26
Chapter 3 - Boot Controller
Table 3-1. Boot Configuration for Silicon Version A.0 ................................................ 3-3
Table 3-2. Boot Configuration for Silicon Version A.1 ................................................ 3-3
Table 3-3. Alternate Pin Function During NAND Flash Booting ................................. 3-5
Table 3-4. Boot Parameters for I2C ........................................................................... 3-6
Table 3-5. Supported Devices.................................................................................... 3-6
Table 3-6. UART0 Boot Parameters .......................................................................... 3-7
Table 3-7. Boot Controller Register Summary ........................................................... 3-7
Table 3-8. PBC Register ............................................................................................ 3-8
Table 3-9. PBC Fields ................................................................................................ 3-8
Table 3-10. CS1OV Register...................................................................................... 3-9
Table 3-11. CS1OV Fields ......................................................................................... 3-9
Table 3-12. EPM Register ........................................................................................ 3-10
Table 3-13. EPM Fields............................................................................................ 3-10
Chapter 4 - Color Liquid Crystal Display Controller
Table 4-1. Pixel Display Arrangement........................................................................ 4-6
Table 4-2. Frame Buffer Pixel Storage Format [31:16] .............................................. 4-6
Table 4-3. Frame Buffer Pixel Storage Format [15:0] ................................................ 4-7
Table 4-4. Palette Data Storage (LH79525 with 12-Bit CLCDC)................................ 4-8
Table 4-5. Palette Data Storage (LH79524 with 16-Bit CLCDC)................................ 4-8
Table 4-6. Supported TFT, HR-TFT, and AD-TFT LCD Panels ............................... 4-10
Table 4-7. Supported Color STN LCD Panels (LH79524 only) ................................ 4-10
Table 4-8. Supported Mono-STN LCD Panels ......................................................... 4-10
Table 4-9. Color STN Intensities From Gray-Scale Modulation ............................... 4-11
Table 4-10. LH79524 LCD Data Multiplexing........................................................... 4-12
Table 4-11. LH79525 LCD Data Multiplexing........................................................... 4-13
Table 4-12. Usable Minimum Values Affecting STN Back Porch Width................... 4-14
Table 4-13. CLCDC Register Summary ................................................................... 4-19
Table 4-14. TIMING0 Register ................................................................................. 4-20
Table 4-15. TIMING0 Fields ..................................................................................... 4-20
Table 4-16. TIMING1 Register ................................................................................. 4-22
Table 4-17. TIMING1 Fields ..................................................................................... 4-22
Table 4-18. TIMING2 Register ................................................................................. 4-24
Table 4-19. TIMING2 Fields ..................................................................................... 4-24
Table 4-20. UPBASE Register ................................................................................. 4-26
Table 4-21. UPBASE Fields ..................................................................................... 4-26
Table 4-22. LPBASE Register.................................................................................. 4-27
Table 4-23. LPBASE Register Fields ....................................................................... 4-27
Table 4-24. INTREN Register .................................................................................. 4-28
Table 4-25. INTREN Fields ...................................................................................... 4-28
Table 4-26. CTRL Register ...................................................................................... 4-29
xx Version 1.0
LH79524/LH79252 User's Guide