Pin Names; Peripheral Devices; Register Addresses - Sharp LH79524 User Manual

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Preface

Pin Names

Package pins are named to indicate the signal(s) or functionality available at the pin.
If the signal or function is active LOW, the name is prefixed with a lower-case 'n',
such as nSCS2. Multiplexed pins are named to indicate all available functions, such
as Pin D11 (Pin 139 for the LH79525): PE1/LCDDCLK, which can function as either GPIO
Port E bit 1, or LCD Data Clock.
These naming conventions help designers recognize and avoid conflicts between multi-
plexed functions but can complicate explanatory text, so this User's Guide uses the name
appropriate to the context. A discussion about Port E bit 1 would use PE1, for example,
but information about LCD data would refer to signal LCDVD5. Readers must be aware
that these are separate signals, with distinctly different functionality, which happen to be
available on the same pin, although never simultaneously.

Peripheral Devices

The LH79524/LH79525 is an SoC built using the ARM720T RISC core as a base. Objects
within the chip but external to the core processor and its support devices are referred to
throughout this User's Guide as 'blocks' or 'Peripheral Devices'.
The LH79524/LH79525 includes two buses: an Advanced High-Performance Bus (AHB)
and an Advanced Peripheral Bus (APB). The devices shown on the APB in the block dia-
grams are an example of Peripheral Devices in this document. Devices that are external
to the chip are referred to as 'External Devices'.

Register Addresses

The LH79524/LH79525 is a memory-mapped device with programmable, internal regis-
ters that control its operation. Each internal register is located at a unique address in the
memory map and the registers are generally grouped in the map by subsystem.
In this User's Guide, the addresses for all registers are expressed as a base address and
an offset from that base. The base address indicates where in the map a group of registers
begins and the offset locates a particular register, relative to its base address. Thus, any
register's absolute address is the sum of its base address and its offset. Programmers will
find this base+offset representation convenient for creating software structures to access
the registers. The absolute addresses are also provided for convenient reference.
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Version 1.0
LH79524/LH79525 User's Guide

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