Table 14-2. Ssp Register Summary; Memory Map - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide
14.2 Register Reference
This section provides the SSP's register memory mapping and bit fields.

14.2.1 Memory Map

The base address for the SSP is 0xFFFC6000. Locations at offsets 0x028 through 0xFFF
are reserved and must not be accessed.
ADDRESS
OFFSET
0x000
0x004
0x008
0x00C
0x010
0x014
0x018
0x01C
0x020
0x024
0x028 - 0xFFF

Table 14-2. SSP Register Summary

NAME
CTRL0 Control Register 0
CTRL1 Control Register 1
DR Data Register
SR Status Register
CPSR Clock Prescale Register
IMSC Interrupt Mask Set and Clear Register
RIS Raw Interrupt Status Register
MIS Masked Interrupt Status Register
ICR Interrupt Clear Register
DCR DMA Control Register
/// Reserved — Do not access
Version 1.0
Synchronous Serial Port
DESCRIPTION
14-9