Table 13-48. Intclr Register; Table 13-49. Intclr Fields; External Interrupt Clear Register (Intclr) - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

13.2.2.20 External Interrupt Clear Register (INTCLR)

This register individually clears active external interrupts. This register can clear edge-
triggered interrupts only. Writing to undefined bits has no effect on the RCPC. Note that
the reset state is indeterminate since this is write only.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR

Table 13-48. INTCLR Register

31 30 29 28 27
— — — — —
RO RO RO RO RO
15 14 13 12 11
///
— — — — —
RO RO RO RO RO

Table 13-49. INTCLR Fields

BITS NAME
31:8 /// Reserved Reading is indeterminate. Write the reset value.
Clear INT7 Interrupt
7 INT7
1 = Clears the active edge-triggered interrupt INT7
0 = No effect
Clear INT6 Interrupt
6 INT6
1 = Clears the active edge-triggered interrupt INT6
0 = No effect
Clear INT5 Interrupt
5 INT5
1 = Clears the active edge-triggered interrupt INT5
0 = No effect
Clear INT4 Interrupt
4 INT4
1 = Clears the active edge-triggered interrupt INT4
0 = No effect
Clear INT3 Interrupt
3 INT3
1 = Clears the active edge-triggered interrupt INT3
0 = No effect
Clear INT2 Interrupt
2 INT2
1 = Clears the active edge-triggered interrupt INT2
0 = No effect
Clear INT1 Interrupt
1 INT1
1 = Clears the active edge-triggered interrupt INT1
0 = No effect
Clear INT0 Interrupt
0 INT0
1 = Clears the active edge-triggered interrupt INT0
0 = No effect
Reset, Clock, and Power Controller
26 25 24 23
///
— — — —
RO RO RO RO
10 9 8 7
INT
7
— — — —
RO RO RO WO
0xFFFE2000 + 0x84
DESCRIPTION
Version 1.0
22 21 20 19 18
— — — — —
RO RO RO RO RO
6 5 4 3 2
INT INT INT INT INT
6 5 4 3 2
— — — — —
WO WO WO WO WO
17 16
— —
RO RO
1 0
INT INT
1 0
— —
WO WO
13-31