Table 11-30. Muxctl11 Register; Table 11-31. Muxctl11 Fields; Multiplexing Control 11 Register (Muxctl11) - Sharp LH79524 User Manual

I/O Configuration

11.2.2.15 Multiplexing Control 11 Register (MUXCTL11)

The MUXCTL11 Register allows software to configure a number of LH79524/LH79525
pins. Bits marked 'LH79524 Only' read as 0 with all writes 'reserved' on the LH79525.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
8-Bit
RESET
16-Bit
RESET
32-Bit
RW
ADDR
11-22

Table 11-30. MUXCTL11 Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
PD4 PK4
0 0 0 0 0
0 1 0 0 0
0 1 0 1 0
RW RW RW RW RW

Table 11-31. MUXCTL11 Fields

BIT NAME
31:16 /// Reserved Reading returns 0. Write the reset value.
PD4/D12 Assignment
00 = PD4
15:14 PD4
01 = D12
10 = Reserved
11 = Reserved
PK4/D20 Assignment (LH79524 Only)
00 = PK4
13:12 PK4
01 = D20
10 = Reserved
11 = Reserved
PD3/D11 Assignment
00 = PD3
11:10 PD3
01 = D11
10 = Reserved
11 = Reserved
PK3/D19 Assignment (LH79524 Only)
00 = PK3
9:8 PK3
01 = D19
10 = Reserved
11 = Reserved
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
PD3 PK3 PD2
0 0 0 0
1 0 0 0
1 0 1 0
RW RW RW RW
0xFFFE5000 + 0x50
DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
PK2 PK1
0 0 0 0 0
1 0 0 0 0
1 0 1 0 1
RW RW RW RW RW
17 16
0 0
RO RO
1 0
PD1
0 0
0 1
0 1
RW RW