Table 9-4. Iccon Register; Table 9-5. Iccon Fields; Register Definitions - Sharp LH79524 User Manual

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LH79524/LH79525 User's Guide

9.2.2 Register Definitions

9.2.2.1 I
The ICCON register allows controlling the operating mode of the I
parameters, and contains the flags used to start a transfer and to set the data direction.
Not all bits are active in every operating mode. Check the individual bit description to
determine if the bit is active during a particular operating mode.
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:8
7
6
5
4
2
C Configuration Register (ICCON)
31
30
29
28
27
0
0
0
0
RO
RO
RO
RO
RO
15
14
13
12
11
///
0
0
0
0
RO
RO
RO
RO
RO
NAME
///
Reserved Reading returns 0. Write the reset value.
Stop After Bus Transaction This bit is only active when in Master mode and
the ACK signal is not driven LOW by the Slave with which the I
communicating.
SABT
Under those conditions, this bit is used to define whether or not a STOP Condi-
tion is generated after each bus transaction or not.
1 = No STOP Condition is generated
2
0 = An I
C STOP Condition is generated after each bus transaction
Read/Write Control Only active in Master mode, it specifies direction for data
transfers.
RWC
1 = Read (Master receiver)
0 = Write (Master transmitter)
Stop Transfer This bit is only active when in Master mode. It instructs the I
Module to terminate the data transfer after the completion of the current transac-
tion. Once the transaction is terminated, this bit is automatically reset to 0.
STOP
1 = Terminate data transfer following current transaction completion
0 = Do not terminate data transfer if additional data is pending
Start Transfer This bit is active in both Master and Slave modes. In Master
mode, this bit causes the I
In Slave mode this bit causes the I
START
Master. This bit is automatically reset to 0 at the completion of the transaction.
1 = (Master) Commence transaction; (Slave) transmit one data byte
0 = No action

Table 9-4. ICCON Register

26
25
24
23
///
0
0
0
0
0
RO
RO
RO
RO
10
9
8
7
0
0
0
0
0
RO
RO
RO
RW
0xFFFC5000 + 0x00

Table 9-5. ICCON Fields

DESCRIPTION
2
C Module to commence a transaction on the I
2
C Module to transmit a byte of data to the
Version 1.0
2
C Module, operating
22
21
20
19
18
0
0
0
0
0
RO
RO
RO
RO
RO
6
5
4
3
2
0
0
0
1
0
RW
RW
RW
RW
RW
2
C Module is
2
I
C Module
17
16
0
0
RO
RO
1
0
MODE
0
0
RW
RW
2
C
2
C bus.
9-7

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