Table 7-35. Dynactcmd Register; Table 7-36. Dynactcmd Fields; Dynamic Memory Active To Active Command Period Register (Dynactcmd) - Sharp LH79524 User Manual

External Memory Controller
7.5.2.13 Dynamic Memory Active to Active Command
Period Register (DYNACTCMD)
The Dynamic Memory Active to Active Command Period Register enables programming
the Active to Active Command Period, tRC. This value is normally found in SDRAM data
sheets as tRC.
Note that tRC is programmable only for memory accesses in the same bank. For accesses
between banks, tRC is fixed at 432 nS and the value in this register is ignored.
This register must only be modified during system initialization, or when there are
no current or outstanding transactions. Software can ensure that there are no current or
outstanding transactions by waiting until the memory controller is idle, then entering
Low-Power Mode (CONTROL:MODE = 1), or Disable Mode (CONTROL:ENABLE = 0).
When in these two modes, external memory access is not allowed, ensuring that
changing parameters will not corrupt external data. Low-Power Mode automatically
refreshes SDRAM; Disable Mode requires commanding the SDRAM to Self Refresh
(DYNMCTRL:SR = 1) prior to entering Disable.
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
7-42

Table 7-35. DYNACTCMD Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
0 0 0 0 0
RO RO RO RO RO

Table 7-36. DYNACTCMD Fields

BITS NAME
31:5 /// Reserved Reading returns 0. Write the reset value.
Active to Active Command Period
4:0 tRC
Period = (tRC + 1) External Memory Clock periods
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
///
0 0 0 0
RO RO RO RO
0xFFFF1000 + 0x048
FUNCTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
tRC
0 0 1 1 1
RO RO RW RW RW
17 16
0 0
RO RO
1 0
1 1
RW RW