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Color Liquid Crystal Display Controller
BIT
31:17
16
15:14
13:12
11
10
9
8
7
6
5
4-30
NAME
///
Reserved Reading returns 0. Write the reset value.
LCD DMA FIFO Watermark Level
1 = Requests data when either of the two DMA FIFOs have eight or more
WATERMARK
empty locations.
0 = Requests data when either of the two DMA FIFOs have four or more
empty locations.
///
Reserved Reading returns 0. Write the reset value.
LCD Vertical Compare Program to generate an interrupt at:
00 = start of vertical synchronization
VCI
01 = start of back porch
10 = start of active video
11 = start of front porch
LCD Power Enable This bit controls power to the LCD panel. For this
bit to be functional, the CONTROL:LCDEN bit must be programmed to 1.
If programmed to 0, LCD power is off regardless of the setting of the
PWR
PWR bit.
1 = LCD power ON
0 = LCD power OFF
Big-Endian Pixel Ordering The BEPO bit selects between little and
big-endian pixel packing for 1, 2 and 4 bpp display modes. The BEPO bit
has no effect on 8, 12, or 16 bpp pixel formats.
BEPO
1 = Big-endian pixel ordering within a byte
0 = Little-endian ordering within a byte
Big-Endian Byte Ordering to the LCD
BEBO
1 = Big-endian byte order
0 = Little-endian byte order
RGB or BGR Format Selection
BGR
1 = Bits 14:10 and 4:0 swapped (blue and red swapped)
0 = Display data normal output
Dual Panel STN LCD
DUAL
1 = Select Dual Panel LCD Mode
0 = Select Single Panel LCD Mode
Monochrome LCD LCD is Monochrome with an 8-bit interface. This bit
controls whether a monochrome STN LCD uses a 4 or an 8-bit parallel
interface. It should be programmed to 0 for all other types of displays.
MONO8L
1 = Mono LCD uses 8-bit interface
0 = Mono LCD uses 4-bit interface
TFT LCD
TFT
1 = LCD is TFT — do not use grayscaler
0 = LCD is an STN display — use grayscaler
Table 4-27. CTRL Fields
DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
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