Figure 15-1. Timer Block Diagram; Theory Of Operation - Sharp LH79524 User Manual

Timers
ADVANCED
PERIPHERAL
BUS (APB)
INTERRUPT
REQUEST
INTERRUPT
REQUEST

15.1 Theory of Operation

Each counter can use either one of the supported internal divided-by-n HCLKs or an exter-
nal clock as its count clock. Clock selection is accomplished using the Timer Control Reg-
ister (CTRLx) for the timer to be programmed.
The clock can be changed only when the counter is in Stop Mode. Attempts to change the
count clock while the counter is running are ignored.
To change the count clock:
1. Stop the counter by writing a 0 to CTRLx:CS.
2. Select a desired clock by writing the value to CTRLx:SEL.
3. Start the counter by writing a 1 to CTRLx:CS.
If an external clock on the CTCLK pin is selected in step 2, the timer increments the counter
of the corresponding timer on the third rising edge of HCLK after a rising edge by CTCLK.
The pulse length of CTCLK must be equal to or longer than, two HCLK periods plus the
setup and hold time (see the Data Sheet for timing information). Shorter pulses can cause
incorrect counts. If CTCLK is not in phase with HCLK, inaccurate counts can occur.
15-2
CTCLK
TIMER 0 BLOCK
TIMER 0 COUNTER
INTERRUPT CONTROL
TIMER 1 BLOCK
TIMER 1 COUNTER
INTERRUPT CONTROL
TIMER 2 BLOCK
TIMER 2 COUNTER
INTERRUPT
INTERRUPT CONTROL
REQUEST

Figure 15-1. Timer Block Diagram

Version 1.0
LH79524/LH79525 User's Guide
INPUT CAPTURE × 5
COMPARE REGISTER × 2
INPUT CAPTURE × 2
COMPARE REGISTER × 2
INPUT CAPTURE × 2
COMPARE REGISTER × 2
CAPTURE
INPUT
COMPARE
OUTPUT
CAPTURE
INPUT
COMPARE
OUTPUT
CAPTURE
INPUT
COMPARE
OUTPUT
LH79525-29