Figure 6-2. Address Matching - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide
The RXBQP register points to the next entry in the Receive Buffer Descriptor List and the
EMAC uses this as the address in system memory to which the frame is written. Once the
frame has been successfully received and written to system memory, the EMAC then
updates the Receive Buffer Descriptor entry (see Table 6-1) with the reason for the
address match and marks the area as being owned by software. When complete, the
Receive Complete interrupt is set. Software is then responsible for handling the data in the
buffer and then releasing the buffer by writing the ownership bit back to 0, then clearing
the interrupt.
If the EMAC is unable to write the data at a rate to match the incoming frame, a Receive
Overrun interrupt is set. If there is no receive buffer available, i.e. the next buffer is still
owned by software, the Receive Buffer Not Available interrupt is set. If the frame is not suc-
cessfully received, a statistic register is incremented and the frame is discarded without
informing software.
DESTINATION ADDRESS
(CONTAINED IN
RECEIVED FRAME)
SPECIFIC ADDRESS 1
SPECIFIC ADDRESS 2
SPECIFIC ADDRESS 3
SPECIFIC ADDRESS 4

Figure 6-2. Address Matching

Version 1.0
Ethernet MAC Controller
HASH ADDRESS
INDEX
MATCH HASH
=
MATCH 1
=
MATCH 2
=
MATCH 3
=
MATCH 4
REGISTERS
LH79525-65
6-15