Timers
15.2 Register Reference
This section describes the location and programming of the Timer registers.
15.2.1 Memory Map
Register offsets in Table 15-1 are relative to the Timer base address
15-6
Table 15-1. Timer 0 Register Summary
ADDRESS
NAME
OFFSET
0x00
CTRL0
0x04
CMP_CAP_CTRL
0x08
INTEN0
0x0C
STATUS0
0x10
CNT0
0x14
T0CMP0
0x18
T0CMP1
0x1C
T0CAPA
0x20
T0CAPB
0x24
T0CAPC
0x28
T0CAPD
0x2C
T0CAPE
Table 15-2. Timer 1 Register Summary
ADDRESS
NAME
OFFSET
0x30
CTRL1
0x34
INTEN1
0x38
STATUS1
0x3C
CNT1
0x40
T1CMP0
0x44
T1CMP1
0x48
T1CAPA
0x4C
T1CAPB
Table 15-3. Timer 2 Register Summary
ADDRESS
NAME
OFFSET
0x50
CTRL2
0x54
INTEN2
0x58
STATUS2
0x5C
CNT2
0x60
T2CMP0
0x64
T2CMP1
0x68
T2CAPA
0x6C
T2CAPB
Version 1.0
LH79524/LH79525 User's Guide
DESCRIPTION
Timer 0 Control Register
Timer 0 Compare/Capture Control Register
Timer 0 Interrupt Control Register
Timer 0 Status Register
Timer 0 Counter Register
Timer 0 Compare Register 0
Timer 0 Compare Register 1
Timer 0 Capture Register A
Timer 0 Capture Register B
Timer 0 Capture Register C
Timer 0 Capture Register D
Timer 0 Capture Register E
DESCRIPTION
Timer 1 Control Register
Timer 1 Interrupt Control Register
Timer 1 Status Register
Timer 1 Counter Register
Timer 1 Compare Register 0
Timer 1 Compare Register 1
Timer 1 Capture Register A
Timer 1 Capture Register B
DESCRIPTION
Timer 2 Control Register
Timer 2 Interrupt Control Register
Timer 2 Status Register
Timer 2 Counter Register
Timer 2 Compare Register 0
Timer 2 Compare Register 1
Timer 2 Capture Register A
Timer 2 Capture Register B
.
0xFFFC4000