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Synchronous Serial Port
Table 14-1 describes these modes.
MODE
SPI
SSI
Microwire
For all three formats, the serial clock (SSPCLK) is held inactive while the SSP is idle and
transitions at the programmed frequency only during active transmission of data. The
SSPCLK pin can be HIGH during idle in SPI Mode if the SPO bit in the Control Register is set.
For Motorola SPI and National Semiconductor Microwire frame formats, the serial frame
(SSPFRM) pin is active LOW and asserted (pulled down) during the entire frame transmis-
sion. Both formats output data on the falling edge of the clock and latch input data on the
rising edge of the clock.
14-2
Table 14-1. Feature Comparison
DESCRIPTION
Lets the SSP communicate
with Motorola SPI-compatible
devices.
Lets the SSP communicate
with Texas Instruments DSP-
compatible Serial Synchronous
Interface devices.
Lets the SSP communicate
with National Semiconductor
Microwire-compatible devices.
Version 1.0
LH79524/LH79525 User's Guide
DATA TRANSFERS
Full-duplex, 4-wire
synchronous
Full-duplex, 4-wire
synchronous
Half-duplex synchronous,
using 8-bit control
messages
COMMENT
Clock polarity and phase
are programmable.
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