Table 11-10. Muxctl4 Register; Table 11-11. Muxctl4 Fields; Multiplexing Control 4 Register (Muxctl4) - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

11.2.2.5 Multiplexing Control 4 Register (MUXCTL4)

The MUXCTL4 Register allows software to configure a number of LH79524/LH79525 pins.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR

Table 11-10. MUXCTL4 Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 0 0 0
RO RO RO RO RW

Table 11-11. MUXCTL4 Fields

BIT NAME
31:12 /// Reserved Reading returns 0. Write the reset value.
PA7/CTCAP2B/CTCMP2B/SCL Assignment
00 = PA7
11:10 PA7
01 = CTCAP2B
10 = CTCMP2B
11 = SCL
PA6/CTCAP2A/CTCMP2A/SDA Assignment
00 = PA6
9:8 PA6
01 = CTCAP2A
10 = CTCMP2A
11 = SDA
PA5/CTCAP1B/CTCMP1B Assignment
00 = PA5
7:6 PA5
01 = CTCAP1B
10 = CTCMP1B
11 = Reserved
PA4/CTCAP1A/CTCMP1A Assignment
00 = PA4
5:4 PA4
01 = CTCAP1A
10 = CTCMP1A
11 = Reserved
PA3/CTCAP0B/CTCMP0B Assignment
00 = PA3
3:2 PA3
01 = CTCAP0B
10 = CTCMP0B
11 = Reserved
PA2/CTCAP0A/CTCMP0A Assignment
00 = PA2
1:0 PA2
01 = CTCAP0A
10 = CTCMP0A
11 = Reserved
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
PA7 PA6 PA5
0 0 0 0
RW RW RW RW
0xFFFE5000 + 0x18
DESCRIPTION
Version 1.0
I/O Configuration
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
PA4 PA3
0 0 0 0 0
RW RW RW RW RW
17 16
0 0
RO RO
1 0
PA2
0 0
RW RW
11-7