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Chapter 8
Static Random Access
Memory Controller
The SHARP BlueStreak LH75400/01/10/11 SoCs have 32KB of Static Random Access
Memory (SRAM). This SRAM is organized into two 16KB blocks:
• 16KB of Tightly Coupled Memory (TCM) 0 Wait State SRAM is available to the proces-
sor as an ARM7TDMI-S bus slave.
• 16KB of internal SRAM is available as an AHB slave and accessible via processor, DMA
Controller, and LCD Controller.
Each memory segment is 512MB in size, though the TCM and internal SRAMs are 16KB
each in size. Any access beyond the first 16KB is mapped to the lower 16KB, but does not
cause a data abort nor a prefetch abort.
6/17/03
8-1
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