Control Bit/Flag Timing Charts
10. Cycle Start Bit, Forced Block End Bit, and Pause Bit
The Pause Bit is ON before the Cycle Start Bit is turned ON, so MC program execution is not started. The
Forced Block End Bit is turned ON at the same time as the Cycle Start Bit, but the Pause Bit is already ON and
the Forced Block End Bit has no effect.
11. Cycle Start Bit, Forced Block End Bit, and Pause Bit
The Forced Block End Bit and Pause Bit are turned ON at the same time, but the Forced Block End Bit takes
precedence, so execution of block N002 is cancelled.
12. Cycle Start Bit, Forced Block End Bit, and Pause Bit
Program execution is paused with the Pause Bit. The Forced Block End Bit signal is ignored. Program execu-
tion will continue when the Cycle Start Bit is turned ON again.
616
Cycle Start Bit
Forced Block End Bit
Pause Bit
Operation
Cycle Start Bit
Forced Block End Bit
Pause Bit
Operation
Cycle Start Bit
Forced Block End Bit
Pause Bit
Operation
Appendix E