Omron CS1W-MC221 - 02-2008 Operation Manual page 314

Interface Specifics
Speed reference
Error counter pulses
Speed reference
Error Counter
Warning Value
Error counter pulses
Error Counter Reset Bit was
turned ON during speed refer-
ence output for N020.
Error Counter Function
Selection (n, 07)
Inputs Program Number
from (n+2)
CPU
Unit
Program Number Read
(n+3, 07)
Cycle Start
(n+3, 02)
Outputs from
MC Unit
Error Counter Reset
(n+7, 04/n+11, 04)
Cycle Start Received
(n+15, 09/n+23, 09)
Program Execution
(n+15, 04/n+23, 04)
Axis Operating
(n+22, 04/n+38, 04)
Busy Flag
(n+22, 01/n+38, 01)
Positioning Completed
(n+22, 05/n+38, 05)
Error Counter Warning
(n+22, 06/n+38, 06)
Operation in Stop Mode
In this example, the error counter is set to generate error counter warnings.
N000 P000 X
N010 G11
N020 G01 X100 F100
N030 G01 X-100 F100
Etc.
The error counter function
is set to an error counter
warning (n, bit 07 ON).
N020 executed
Stop Mode specified.
The pulses in the error counter have
accumulated during execution of N020
for some reason.
The Error Counter Reset Bit is checked when
the speed reference for N020 has been output
completely. If the Error Counter Reset Bit is ON,
the error counter will be reset to 0 and program
execution will be paused as long as the bit re-
mains ON.
N030 executed
Program execution is re-
started from N030 when the
Error Counter Reset Bit is
turned OFF.
Section 5-4
Time
Speed reference
287