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M16C/62P Group (M16C/62P, M16C/62PT)
24.9 Serial I/O
24.9.1 Clock Synchronous Serial I/O
24.9.1.1 Transmission/reception
With an external clock selected, and choosing the RTS function, the output level of the RTSi pin goes
to "L" when the data-receivable status becomes ready, which informs the transmission side that the
reception has become ready. The output level of the RTSi pin goes to "H" when reception starts. So
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if the RTSi pin is connected to the CTSi pin on the transmission side, the circuit can transmission and
reception data with consistent timing. With the internal clock, the RTS function has no effect.
If a low-level signal is applied to the NMI pin when the IVPCR1 bit in the TB2SC register = 1 (three-
phase output forcible cutoff by input on NMI pin enabled), the RTS2 and CLK2 pins go to a high-
impedance state.
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
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f o
3
6
4
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24. Usage Precaution
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