Renesas M16C/62P Hardware Manual page 163

Renesas 16-bit single-chip microcomputer
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M16C/62P Group (M16C/62P, M16C/62PT)
Timer B2 Interrupt Generation Frequency Set Counter
b7
NOTES:
1. Use the MOV instruction to set the ICTB2 register.
2. If the INV01 bit is set to "1", set the ICTB2 register when the TB2S bit is set to "0" (timer B2 counter stopped),
If the INV01 bit is set to "0" and the TB2S bit to "1" (timer B2 counter start), do not set the ICTB2 register when
the timer B2 underflows.
3. If the INV00 bit is set to "1", the first interrupt is generated when the timer B2 underflows n-1 times, n
being the value set in the ICTB2 counter. Subsequent interrupts are generated every n times the timer
B2 underflows.
Timer Ai, Ai-1 Register
b15
NOTES:
1. Use a 16-bit data for read and write.
2. If the TAi or TAi1 register is set to "0000h", no counters start and no timer Ai interrupt is generated.
3. Use the MOV instruction to set the TAi and TAi1 registers.
4. When the INV15 bit in the INVC1 register is set to "0" (dead timer enabled), phase switches from an
inactive level to an active level when the dead time timer stops.
5. When the INV11 bit is set to "0" (three-phase mode 0), the value of the TAi register is transferred to
the reload register by a timer Ai start trigger.
When the INV11 bit is set to "1" (three-phase mode 1), the value of the TAi1 register is first
transferred to the reload register by a timer Ai start trigger. Then, the value of the TAi register is
transferred by the next trigger. The values of the TAi1 and TAi registers are transferred alternately to
the reload register with every timer Ai start trigger.
6. Do not write to these registers when the timer B2 underflows.
7. Follow the procedure below to set the TAi1 register.
(a) Write value to the TAi1 register,
(b) Wait one timer Ai count source cycle, and
(c) Write the same value as (a) to the TAi1 register.
Timer B2 Special Mode Register
b7
b6
NOTES:
Figure 16.5 ICTB2 Register, TA1, TA2, TA4, TA11, TA21 and TA41 Registers, and TB2SC Registers
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
b0
Symbol
ICTB2
When the INV01 bit is set to "0" (the ICTB2 counter
increments whenever the timer B2 underflows) and the
setting value is n, the timer B2 interrupt is generated
every nth time timer B2 underflow occurs.
When the INV01 bit is set to "1" (the INV00 bit selects
count timing of the ICTB2 counter) and setting value is
n, the timer B2 interrupt is generated every nth time
timer B2 underflow meeting the condition selected in the
INV00 bit occurs .
Nothing is assigned. When write, set to "0".
(i=1, 2, 4)
Symbol
b8
b7
b0
TA1, TA2, TA4
TA11, TA21, TA41 0343h - 0342h, 0345h - 0344h, 0347h - 0346h
If setting value is n, the timer stops when the nth count
source is counted after a start trigger is generated.
Positive phase changes to negative phase, and vice
versa, when the timers A1, A2 and A4 stop.
b5
b4
b3
b2
b1
b0
Symbol
TB2SC
Bit Symbol
PWCOM
IVPCR1
(b7-b2)
1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enable).
2. If the INV11 bit is "0" (three-phase mode 0) or the INV06 bit is "1" (sawtooth wave modulation mode), set
this bit to "0" (Timer B2 underflow).
3. Related pins are U(P8_0), U(P8_1), V(P7_2), V(P7_3), W(P7_4) and W(P7_5). If a low-level signal is
applied to the NMI pin when the IVPCR1 bit = 1, the target pins go to a high-impedance state regardless
of which functions of those pins are being used. After forced interrupt (cutoff), input "H" to the NMI pin and
set IVPCR1 bit to "0": this forced cutoff will be reset.
page 149
f o
3
6
4
16. Three-Phase Motor Control Timer Function
Address
034Dh
Function
(1, 2, 3, 4, 5, 6, 7)
Address
0389h - 0388h, 038Bh - 038Ah, 038Fh - 038Eh
Function
(1)
Address
After Reset
039Eh
XXXXXX00b
Bit Name
0 : Timer B2 underflow
Timer B2 Reload Timing
1 : Timer A output at odd-numbered
Switching Bit
occurrences
Three Phase Output
0 : Three-phase output forcible cutoff
(3)
Port NMI Control Bit 1
by NMI input (high-impedance)
disabled
1 : Three-phase output forcible cutoff
by NMI input (high-impedance)
enabled
Nothing is assigned.
When write, set to "0". When read, its content is "0".
(1, 2, 3)
After Reset
Indeterminate
Setting Range
RW
1 to 15
WO
After Reset
Indeterminate
Indeterminate
Setting Range
RW
0000h to FFFFh
WO
Function
RW
RW
(2)
RW

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