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M16C/62P Group (M16C/62P, M16C/62PT)
DMA1 Request Cause Select Register
b7
b6
b5
b4
b3
b2
NOTES :
1. The Factors of DMA1 requests can be selected by a combination of DMS bit and DSEL3 to DSEL0 bits in the
manner described below.
DSEL3 to DSEL0 DMS=0 (Basic Factor of Request)
0 0 0 0 b
Falling Edge of INT1 Pin
0 0 0 1 b
Software Trigger
0 0 1 0 b
Timer A0
0 0 1 1 b
Timer A1
0 1 0 0 b
Timer A2
0 1 0 1 b
Timer A3
0 1 1 0 b
Timer A4
0 1 1 1 b
Timer B0
1 0 0 0 b
Timer B1
1 0 0 1 b
Timer B2
1 0 1 0 b
UART0 Transmit
1 0 1 1 b
UART0 Receive/ACK0
1 1 0 0 b
UART2 Transmit
1 1 0 1 b
UART2 Receive/ACK2
1 1 1 0 b
A/D Conversion
1 1 1 1 b
UART1 Receive/ACK1
DMAi Control Register
b7
b6
b5
b4
b3
b2
NOTES:
1. The DMAS bit can be set to "0" by writing "0" in a program (This bit remains unchanged even if "1" is written).
2. At least one of the DAD and DSD bits must be "0" (address direction fixed).
Figure 14.3 DM1SL Register, DM0CON Register, and DM1CON Registers
R
e
. v
2
3 .
0
S
e
p
0
, 1
2
0
0
4
R
E
J
0
9
B
0
1
8
5
0 -
2
3
0
Z
Symbol
b1
b0
DM1SL
Bit Symbol
DSEL0
DMA Request Factor
Select Bit
DSEL1
DSEL2
DSEL3
Nothing is assigned. When write, set to "0".
(b5-b4)
When read, their contents are "0".
DMA Request Factor
DMS
Expansion Select Bit
Software DMA
Request Bit
DSR
(i=0,1)
Symbol
b1
b0
DM0CON
DM1CON
Bit Symbol
Transfer Unit Bit Select Bit
DMBIT
Repeat Transfer Mode
DMASL
Select Bit
DMA Request Bit
DMAS
DMA Enable Bit
DMAE
Source Address Direction
DSD
Select Bit
Destination Address
DAD
Direction Select Bit
Nothing is assigned. When write, set to "0".
(b7-b6)
When read, their contents are "0".
page 113
f o
3
6
4
Address
After Reset
03BAh
Bit Name
(NOTE 1)
0: Basic factor of request
1: Extended factor of request
A DMA request is generated by
setting this bit to "1" when the DMS
bit is "0" (basic factor) and the DSEL3
to DSEL0 bits are "0001b"
(software trigger).
The value of this bit when read is "0".
DMS=1 (Extended Factor of Request)
–
–
–
–
–
SI/O3
SI/O4
Two Edges of INT1
–
–
–
–
–
–
–
–
Address
After Reset
002Ch
00000X00b
003Ch
00000X00b
Bit Name
0 : 16 bits
1 : 8 bits
0 : Single transfer
1 : Repeat transfer
0 : DMA not requested
1 : DMA requested
0 : Disabled
1 : Enabled
0 : Fixed
(2)
1 : Forward
0 : Fixed
(2)
1 : Forward
00h
Function
RW
RW
RW
RW
RW
RW
RW
Function
RW
RW
RW
(1)
RW
RW
RW
RW
14. DMAC
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